Datasheet

56F8346 Technical Data, Rev. 15
14 Freescale Semiconductor
Preliminary
Figure 1-2 Peripheral Subsystem
Timer A
Timer C
Timer D
SPI 1
ADCB
ADCA
FlexCAN
GPIOA
SPI0
SCI0
SCI1
Interrupt
Controller
To/From IPBus Bridge
PWMA
PWMB
RESET
Quadrature Decoder 0
Note: ADCA and ADCB use the same volt-
age reference circuit with V
REFH
, V
REFP,
V
REFMID
, V
REFN
, and V
REFLO
pins.
GPIOB
GPIOC
GPIOD
GPIOE
GPIOF
Timer B
Quadrature Decoder 1
TEMP_SENSE
CLKGEN
(OSC/PLL)
POR & LVI
SIM
NOT available on the 56F8146 device.
Low-Voltage Interrupt
System POR
COP Reset
COP
SYNC Output
SYNC Output
ch3i
ch2i
ch2i
ch3i
1
8
8
1
13
12
2
4
2
4
4
2
2
IPBus