Datasheet

Quad Timer Timing
56F8346 Technical Data, Rev. 15
Freescale Semiconductor 157
Preliminary
10.11 Quad Timer Timing
Figure 10-14 Timer Timing
10.12 Quadrature Decoder Timing
Table 10-19 Timer Timing
1, 2
1. In the formulas listed, T = the clock cycle. For 60MHz operation, T = 16.67ns.
2. Parameters listed are guaranteed by design.
Characteristic Symbol Min Max Unit See Figure
Timer input period
P
IN
2T + 6 — ns 10-14
Timer input high / low period
P
INHL
1T + 3 — ns 10-14
Timer output period
P
OUT
1T - 3 — ns 10-14
Timer output high / low period
P
OUTHL
0.5T - 3 — ns 10-14
Table 10-20 Quadrature Decoder Timing
1, 2
1. In the formulas listed, T = the clock cycle. For 60MHz operation, T = 16.67ns.
2. Parameters listed are guaranteed by design.
Characteristic Symbol Min Max Unit See Figure
Quadrature input period
P
IN
4T + 12 — ns 10-15
Quadrature input high / low period
P
HL
2T + 6 — ns 10-15
Quadrature phase period
P
PH
1T + 3 — ns 10-15
P
OUT
P
OUTHL
P
OUTHL
P
IN
P
INHL
P
INHL
Timer Inputs
Timer Outputs