Datasheet

Signal Pins
56F8346 Technical Data, Rev. 15
Freescale Semiconductor 33
Preliminary
PHASEB1
(TB1)
(MOSI1)
(GPIOC1)
7Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
Phase B1 — Quadrature Decoder 1, PHASEB input for decoder 1.
TB1 — Timer B, Channel 1
SPI 1 Master Out/Slave In — This serial data pin is an output from
a master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge the
slave device uses to latch the data. To activate the SPI function,
set the PHSB_ALT bit in the SIM_GPS register. For details, see
Part 6.5.8.
Port C GPIO — This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8346, the default state after reset is PHASEB1.
In the 56F8146, the default state is not one of the functions offered
and must be reconfigured.
To deactivate the internal pull-up resistor, clear bit 1 in the
GPIOC_PUR register.
Table 2-2 Signal and Package Information for the 144 Pin LQFP
Signal Name Pin No. Type
State
During
Reset
Signal Description