Datasheet

56F8346 Technical Data, Rev. 15
50 Freescale Semiconductor
Preliminary
Program Memory buses. They are controlled by one set of banked registers. Data Memory Flash resides
on the Data Memory buses and is controlled separately by own set of banked registers.
The top nine words of the Program Memory Flash are treated as special memory locations. The content of
these words is used to control the operation of the Flash Controller. Because these words are part of the
Flash Memory content, their state is maintained during power-down and reset. During chip initialization,
the content of these memory locations is loaded into Flash Memory control registers, detailed in the Flash
Memory chapter of the 56F8300 Peripheral User Manual. These configuration parameters are located
between $00_FFF7 and $00_FFFF.
Figure 4-1 Flash Array Memory Maps
Table 4-7 shows the page and sector sizes used within each Flash memory block on the chip.
Note: Data Flash is NOT available on the 56F8146 device.
Please see 56F8300 Peripheral User Manual for additional Flash information.
Table 4-7. Flash Memory Partitions
Flash Size Sectors Sector Size Page Size
Program Flash 128KB 16 4K x 16 bits 512 x 16 bits
Data Flash 8KB 16 256 x 16 bits 256 x 16 bits
Boot Flash 8KB 4 1K x 16 bits 256 x 16 bits
BOOT_FLASH_START = $02_0000
BOOT_FLASH_START + $1FFF
Block 0 Odd
Block 0 Even
PROG_FLASH_START + $00_FFFF
. . .
8KB
Boot
Reserved
Configure Field
PROG_FLASH_START + $00_FFF7
PROG_FLASH_START + $00_FFF6
128K Bytes
PROG_FLASH_START = $00_0000
FM_PROG_MEM_TOP = $00_FFFF
BLOCK 0 Odd (2 Bytes) $00_0003
BLOCK 0 Even (2 Bytes) $00_0002
BLOCK 0 Odd (2 Bytes) $00_0001
BLOCK 0 Even (2 Bytes) $00_0000
FM_BASE + $14
Banked Registers
Unbanked Registers
8KB
FM_BASE + $00
DATA_FLASH_START + $0FFF
DATA_FLASH_START + $0000
Data Memory
Program Memory
Note: Data Flash is
NOT available in the
56F8146 device.