Datasheet

56F8346 Technical Data, Rev. 15
36 Freescale Semiconductor
Preliminary
ISB0
(GPIOD10)
50 Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
ISB0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMB.
Port D GPIO — These three GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to ISB functionality.
To deactivate the internal pull-up resistor, clear the appropriate bit
of the GPIOD_PUR register. For details, see Part 6.5.8.
ISB1
(GPIOD11)
52
ISB2
(GPIOD12)
53
FAULTB0 56 Schmitt
Input
Input,
pull-up
enabled
FAULTB0 - 3 — These four fault input pins are used for disabling
selected PWMB outputs in cases where fault conditions originate
off-chip.
To deactivate the internal pull-up resistor, set the PWMB bit in the
SIM_PUDR register. For details, see Part 6.5.8.
FAULTB1 57
FAULTB2 58
FAULTB3 61
ANA0 88 Input Analog
Input
ANA0 - 3 — Analog inputs to ADC A, channel 0
ANA1 89
ANA2 90
ANA3 91
ANA4 92 Input Analog
Input
ANA4 - 7 — Analog inputs to ADC A, channel 1
ANA5 93
ANA6 94
ANA7 95
V
REFH
101 Input Analog
Input
V
REFH
— Analog Reference Voltage High. V
REFH
must be less
than or equal to
V
DDA_ADC.
V
REFP
100 Input/
Output
Analog
Input/
Output
V
REFP
, V
REFMID
& V
REFN
— Internal pins for voltage reference
which are brought off-chip so they can be bypassed. Connect to a
0.1μF low ESR capacitor.
V
REFMID
99
V
REFN
98
V
REFLO
97 Input Analog
Input
V
REFLO
— Analog Reference Voltage Low. This should normally
be connected to a low-noise V
SSA
.
Table 2-2 Signal and Package Information for the 144 Pin LQFP
Signal Name Pin No. Type
State
During
Reset
Signal Description