Datasheet

56F8355 Technical Data, Rev. 17
126 Freescale Semiconductor
Preliminary
in the 56F8300 Peripheral User Manual.
8.2 Memory Maps
The width of the GPIO port defines how many bits are implemented in each of the GPIO registers. Based
on this and the default function of each of the GPIO pins, the reset values of the GPIOx_PUR and
GPIOx_PER registers will change from port to port. Tables 4-29 through 4-34 define the actual reset
values of these registers for these devices.
8.3 Configuration
There are six GPIO ports defined on the 56F8355/56F8155. The width of each port and the associated
peripheral function is shown in Table 8-1 and Table 8-2. The specific mapping of GPIO port pins is
shown in Table 8-2.
Table 8-1 56F8355 GPIO Ports Configuration
GPIO Port
Port
Width
Available
Pins in
56F8355
Peripheral Function Reset Function
A 14 6 6 pins - EMI Address pins - Can only be used as GPIO
8 pins - EMI Address pins - Not available in this package
EMI Address
N/A
B 8 5 5 pins - EMI Address pins - Can only be used as GPIO
3 pins - EMI Address pins - Not available in this package
GPIO
N/A
C 11 11 4 pins - DEC1 / TMRB / SPI1
4 pins - DEC0 / TMRA
3 pins - PWMA current sense
DEC1 / TMRB
DEC0 / TMRA
PWMA current
sense