Datasheet

Signal Pins
56F8355 Technical Data, Rev. 17
Freescale Semiconductor 23
Preliminary
GPIOD0
(CS2
)
42 Input/
Output
Output
Input,
pullup
enabled
Port D GPIO — These six GPIO pins can be individually
programmed as input or output pins.
Chip Select — CS2 - CS7 may be programmed within the EMI
module to act as chip selects for specific areas of the external
memory map. Depending upon the state of the DRV bit in the EMI
bus control register (BCR), CS2
- CS7 are tri-stated when the
external bus is inactive.
After reset, these pins are configured as GPIO.
To deactivate the internal pullup resistor, clear the appropriate
GPIO bit in the GPIOD_PUR register.
Example: GPIOD0, clear bit 0 in the GPIOD_PUR register.
GPIOD1
(CS3
)
43
GPIOD2
(CS4
)
44
GPIOD3
(CS5)
45
GPIOD4
(CS6
)
46
GPIOD5
(CS7
)
47
TXD0
(GPIOE0)
7 Output
Input/
Output
In reset,
output is
disabled,
pullup is
enabled
Transmit Data — SCI0 transmit data output
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pullup resistor, clear bit 0 in the
GPIOE_PUR register.
RXD0
(GPIOE1)
8 Input
Input/
Output
Input,
pullup
enabled
Receive Data — SCI0 receive data input
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pullup resistor, clear bit 1 in the
GPIOE_PUR register.
TXD1
(GPIOD6)
40 Output
Input/
Output
In reset,
output is
disabled,
pullup is
enabled
Transmit Data — SCI1 transmit data output
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pullup resistor, set bit 6 in the
GPIOD_PUR register.
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal Name Pin No. Type
State
During
Reset
Signal Description