Datasheet

Signal Pins
56F8355 Technical Data, Rev. 17
Freescale Semiconductor 31
Preliminary
ISB0
(GPIOD10)
48 Schmitt
Input
Schmitt
Input/
Output
Input,
pullup
enabled
ISB0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMB.
Port D GPIO — These GPIO pins can be individually programmed
as input or output pins.
At reset, these pins default to ISB functionality.
To deactivate the internal pullup resistor, clear the appropriate bit
of the GPIOD_PUR register. For details, see Part 6.5.6.
ISB1
(GPIOD11)
50
ISB2
(GPIOD12)
51
FAULTB0 54 Schmitt
Input
Input,
pullup
enabled
FAULTB0 - 3 — These four fault input pins are used for disabling
selected PWMB outputs in cases where fault conditions originate
off-chip.
To deactivate the internal pullup resistor, set the PWMB bit in the
SIM_PUDR register. For details, see Part 6.5.6.
FAULTB1 55
FAULTB2 56
FAULTB3 57
ANA0 80 Input Analog
Input
ANA0 - 3 — Analog inputs to ADC A, channel 0
ANA1 81
ANA2 82
ANA3 83
ANA4 84 Input Analog
Input
ANA4 - 7 — Analog inputs to ADC A, channel 1
ANA5 85
ANA6 86
ANA7 87
V
REFH
93 Input Analog
Input
V
REFH
— Analog Reference Voltage High. V
REFH
must be less
than or equal to
V
DDA_ADC.
V
REFP
92 Input/
Output
Analog
Input/
Output
V
REFP
, V
REFMID
& V
REFN
— Internal pins for voltage reference
which are brought off-chip so they can be bypassed. Connect to a
0.1 μF low ESR capacitor.
V
REFMID
91
V
REFN
90
V
REFLO
89 Input Analog
Input
V
REFLO
— Analog Reference Voltage Low. This should normally
be connected to a low-noise V
SSA
.
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal Name Pin No. Type
State
During
Reset
Signal Description