Datasheet

Configuration
56F8356 Technical Data, Rev. 13
Freescale Semiconductor 135
Preliminary
GPIOD
0 GPIO CS2
48
1 GPIO CS3 49
2
N/A
3 N/A
4 N/A
5 N/A
6Peripheral TXD1 42
7Peripheral RXD1 43
8PeripheralPS
/ CS0 46
9PeripheralDS / CS1 47
10 Peripheral ISB0 50
11 Peripheral ISB1 52
12 Peripheral ISB2 53
GPIOE
0Peripheral TXD0 4
1Peripheral RXD0 5
2Peripheral A6 17
3Peripheral A7 18
4 Peripheral SCLK0 130
5 Peripheral MOSI0 132
6 Peripheral MISO0 131
7 Peripheral SS0
129
8 Peripheral TC0 118
9 N/A
10 Peripheral TD0 116
11 Peripheral TD1 117
12
N/A
13 N/A
Table 8-3 GPIO External Signals Map (Continued)
Pins in shaded rows are not available in 56F8356/56F8156
Pins in italics are NOT available in the 56F8156 device
GPIO Port GPIO Bit
Reset
Function
Functional Signal Package PIn