Datasheet

56F8356 Technical Data, Rev. 13
154 Freescale Semiconductor
Preliminary
Figure 10-10 SPI Master Timing (CPHA = 0)
Fall time
Master
Slave
t
F
—
—
9.7
9.0
ns
ns
10-10, 10-11,
10-12, 10-13
1. Parameters listed are guaranteed by design.
Table 10-18 SPI Timing
1
(Continued)
Characteristic Symbol Min Max Unit See Figure
SCLK (CPOL = 0)
(Output)
SCLK (CPOL = 1)
(Output)
MISO
(Input)
MOSI
(Output)
MSB in Bits 14–1 LSB in
t
F
t
C
t
CL
t
CL
t
R
t
R
t
F
t
DS
t
DH
t
CH
t
DI
t
DV
t
DI
(ref)
t
R
Master MSB out Bits 14–1 Master LSB out
SS
(Input)
t
CH
SS is held High on master
t
F