Datasheet

56F8356 Technical Data, Rev. 13
158 Freescale Semiconductor
Preliminary
Figure 10-14 Timer Timing
10.12 Quadrature Decoder Timing
Figure 10-15 Quadrature Decoder Timing
Table 10-20 Quadrature Decoder Timing
1, 2
1. In the formulas listed, T = the clock cycle. For 60MHz operation, T=16.67ns.
2. Parameters listed are guaranteed by design.
Characteristic Symbol Min Max Unit See Figure
Quadrature input period
P
IN
4T + 12 — ns 10-15
Quadrature input high / low period
P
HL
2T + 6 — ns 10-15
Quadrature phase period
P
PH
1T + 3 — ns 10-15
P
OUT
P
OUTHL
P
OUTHL
P
IN
P
INHL
P
INHL
Timer Inputs
Timer Outputs
Phase B
(Input)
P
IN
P
HL
P
HL
Phase A
(Input)
P
IN
P
HL
P
HL
P
PH
P
PH
P
PH
P
PH