Datasheet

Peripheral Memory Mapped Registers

56F8356 Technical Data, Rev. 13

Freescale Semiconductor 65

Preliminary

ADCB_LLMT 1 $12 Low Limit Register 1

ADCB_LLMT 2 $13 Low Limit Register 2

ADCB_LLMT 3 $14 Low Limit Register 3

ADCB_LLMT 4 $15 Low Limit Register 4

ADCB_LLMT 5 $16 Low Limit Register 5

ADCB_LLMT 6 $17 Low Limit Register 6

ADCB_LLMT 7 $18 Low Limit Register 7

ADCB_HLMT 0 $19 High Limit Register 0

ADCB_HLMT 1 $1A High Limit Register 1

ADCB_HLMT 2 $1B High Limit Register 2

ADCB_HLMT 3 $1C High Limit Register 3

ADCB_HLMT 4 $1D High Limit Register 4

ADCB_HLMT 5 $1E High Limit Register 5

ADCB_HLMT 6 $1F High Limit Register 6

ADCB_HLMT 7 $20 High Limit Register 7

ADCB_OFS 0 $21 Offset Register 0

ADCB_OFS 1 $22 Offset Register 1

ADCB_OFS 2 $23 Offset Register 2

ADCB_OFS 3 $24 Offset Register 3

ADCB_OFS 4 $25 Offset Register 4

ADCB_OFS 5 $26 Offset Register 5

ADCB_OFS 6 $27 Offset Register 6

ADCB_OFS 7 $28 Offset Register 7

ADCB_POWER $29 Power Control Register

ADCB_CAL $2A ADC Calibration Register

Table 4-22 Temperature Sensor Register Address Map

(TSENSOR_BASE = $00 F270)

Temperature Sensor is NOT available in the 56F8156 device

TSENSOR_CNTL $0 Control Register

Table 4-21 Analog-to-Digital Converter Registers Address Map (Continued)

(ADCB_BASE = $00 F240)