Datasheet

56F8365 Technical Data, Rev. 9
118 Freescale Semiconductor
6.5.7 CLKO Select Register (SIM_CLKOSR)
The CLKO select register can be used to multiplex out any one of the clocks generated inside the clock
generation and SIM modules. The default value is SYS_CLK. This path has been optimized in order to
minimize any delay and clock duty cycle distortion. All other clocks primarily muxed out are for test
purposes only, and are subject to significant phase shift at high frequencies.
The upper four bits of the GPIOB register can function as GPIO, [A23:A20], or as additional clock output
signals. GPIO has priority and is enabled/disabled via the GPIOB_PER. If GPIOB[7:4] are programmed
to operate as peripheral outputs, then the choice between [A23:A20] and additional clock outputs is done
here in the CLKOSR. The default state is for the peripheral function of GPIOB[7:4] to be programmed as
[A23:A20]. This can be changed by altering [A23:A20], as shown in Figure 6-9.
Figure 6-9 CLKO Select Register (SIM_CLKOSR)
6.5.7.1 Reserved—Bits 15–10
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.7.2 Alternate GPIO_B Peripheral Function for A23 (A23)—Bit 9
• 0 = Peripheral output function of GPIOB[7] is defined to be A[23]
• 1 = Peripheral output function of GPIOB[7] is defined to be the oscillator_clock (MSTR_OSC, see
Figure 3-4)
6.5.7.3 Alternate GPIO_B Peripheral Function for A22 (A22)—Bit 8
• 0 = Peripheral output function of GPIOB[6] is defined to be A[22]
• 1 = Peripheral output function of GPIOB[6] is defined to be SYS_CLK2
6.5.7.4 Alternate GPIO_B Peripheral Function for A21 (A21)—Bit 7
• 0 = Peripheral output function of GPIOB[5] is defined to be A[21]
• 1 = Peripheral output function of GPIOB[5] is defined to be SYS_CLK
6.5.7.5 Alternate GPIO_B Peripheral Function for A20 (A20)—Bit 6
• 0 = Peripheral output function of GPIOB[4] is defined to be A[20]
• 1 = Peripheral output function of GPIOB[4] is defined to be the prescaler_clock (FREF, see Figure 3-4)
6.5.7.6 Clockout Disable (CLKDIS)—Bit 5
• 0 = CLKOUT output is enabled and will output the signal indicated by CLKOSEL
• 1 = CLKOUT is tri-stated
Base + $A
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
0 0 0 0 0 0
A23 A22 A21 A20
CLK
DIS
CLKOSEL
Write
RESET
0 0 0 0 0 0 0 0001 0 0000