Datasheet

56F8365 Technical Data, Rev. 9
146 Freescale Semiconductor
Stop1
950A13A0A165A
• 8MHz Device Clock
• All peripheral clocks are off
• ADC powered off
• PLL powered off
Stop2
100A13A0A155A
• External Clock is off
• All peripheral clocks are off
• ADC powered off
• PLL powered off
1. No Output Switching
Table 10-9. Regulator Parameters
Characteristic Symbol Min Typical Max Unit
Unloaded Output Voltage
(0mA Load)
V
RNL
2.25 — 2.75 V
Loaded Output Voltage
(200mA load)
V
RL
2.25 — 2.75 V
Line Regulation @ 250mA load
(V
DD
33 ranges from 3.0V to 3.6V)
V
R
2.25 — 2.75 V
Short Circuit Current
(output shorted to ground)
Iss — — 700 mA
Bias Current I
bias
—5.8 7 mA
Power-down Current I
pd
—0 2A
Short-Circuit Tolerance
(output shorted to ground)
T
RSC
— — 30 minutes
Table 10-10. PLL Parameters
Characteristics Symbol Min Typical Max Unit
PLL Start-up time T
PS
0.3 0.5 10 ms
Resonator Start-up time T
RS
0.1 0.18 1 ms
Min-Max Period Variation T
PV
120 — 200 ps
Table 10-8 Current Consumption per Power Supply Pin (Typical)
On-Chip Regulator Disabled (OCR_DIS = High)
Mode
I
DD_Core
I
DD_IO
1
I
DD_ADC
I
DD_OSC_PLL
Test Conditions