Datasheet

Reset, Stop, Wait, Mode Select, and Interrupt Timing
56F8365 Technical Data, Rev. 9
Freescale Semiconductor 151
Figure 10-5 Asynchronous Reset Timing
Figure 10-6 External Interrupt Timing (Negative Edge-Sensitive)
IRQA Width Assertion to Recover from Stop
State
3
t
IW
1.5T — ns 10-9
1. In the formulas, T = clock cycle. For an operating frequency of 60MHz, T = 16.67ns. At 8MHz (used during Reset and
Stop modes), T = 125ns.
2. Parameters listed are guaranteed by design.
3. The interrupt instruction fetch is visible on the pins only in Mode 3.
Table 10-16 Reset, Stop, Wait, Mode Select, and Interrupt Timing
1,2
Characteristic Symbol
Typical
Min
Typical
Max
Unit See Figure
First Fetch
t
RA
t
RAZ
t
RDA
A0–A15,
D0–D15
RESET
IRQA,
IRQB
t
IRW