Datasheet

Signal Pins
56F8365 Technical Data, Rev. 9
Freescale Semiconductor 23
GPIOD1
(CS3
)
(CAN2_RX)
43 Schmitt
Input/
Output
Output
Schmitt
Input
Input,
pull-up
enabled
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
Chip Select — CS3 may be programmed within the EMI module
to act as a chip select for specific areas of the external memory
map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS3
is tri-stated when the external bus is
inactive.
FlexCAN2 Receive Data — This is the CAN input. This pin has
an internal pull-up resistor.
At reset, this pin is configured as GPIO. This configuration can be
changed by setting bit 1 in the GPIO_D_PER register, then
change bit 5 in the SIM_GPS register to select the desired
peripheral function.
To deactivate the internal pull-up resistor, clear bit 1 in the
GPIOD_PUR register.
GPIOD2
(CS4
)
44 Input/
Output
Output
Input,
pull-up
enabled
Port D GPIO — These four GPIO pins can be individually
programmed as input or output pins.
Chip Select — CS4 - CS7 may be programmed within the EMI
module to act as chip selects for specific areas of the external
memory map.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), CS4
- CS7 are tri-stated when the external bus is
inactive
After reset, these pins are configured as GPIO.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOD_PUR register.
Example: GPIOD2, clear bit 2 in the GPIOD_PUR register.
GPIOD3
(CS5
)
45
GPIOD4
(CS6)
46
GPIOD5
(CS7)
47
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal
Name
Pin No. Type
State
During
Reset
Signal Description