Datasheet

56F8365 Technical Data, Rev. 9
32 Freescale Semiconductor
PWMB0 32 Output In reset,
output is
disabled
PWMB0 - 5 — Six PWMB output pins.
PWMB1 33
PWMB2 34
PWMB3 37
PWMB4 38
PWMB5 39
ISB0
(GPIOD10)
48 Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
ISB0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMB.
Port D GPIO — These GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to ISA functionality.
Deactivate pull-up by setting the approproate bit of the
GPIOD_PUR register. See Part 6.5.6 for details.
ISB1
(GPIOD11)
50
ISB2
(GPIOD12)
51
FAULTB0 54 Schmitt
Input
Input,
pull-up
enabled
FAULTB0 - 3 — These four fault input pins are used for disabling
selected PWMB outputs in cases where fault conditions originate
off-chip.
To deactivate the internal pull-up resistor, set the PWMB bit in the
SIM_PUDR register. See Part 6.5.6 for details.
FAULTB1 55
FAULTB2 56
FAULTB3 57
ANA0 80 Input Analog
Input
ANA0 - 3 — Analog inputs to ADC A, channel 0
ANA1 81
ANA2 82
ANA3 83
ANA4 84 Input Analog
Input
ANA4 - 7 — Analog inputs to ADC A, channel 1
ANA5 85
ANA6 86
ANA7 87
V
REFH
93 Input Analog
Input
V
REFH
— Analog Reference Voltage High. V
REFH
must be less
than or equal to
V
DDA_ADC.
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal
Name
Pin No. Type
State
During
Reset
Signal Description