Datasheet

Program Map
56F8365 Technical Data, Rev. 9
Freescale Semiconductor 39
4.2 Program Map
The Program memory map is located in Table 4-4. The operating mode control bits (MA and MB) in the
Operating Mode Register (OMR) control the Program memory map. At reset, these bits are set as indicated
in Table 4-2.
EXT_BOOT = EMI_MODE = 0 and cannot be changed in the 56F8365 or 56F8165.
Note: Program RAM is NOT available on the 56F8165 device.
After reset, the OMR MA bit can be changed and will have an effect on the P-space memory map, as shown
in Table 4-3. Changing the OMR MB bit will have no effect.
Data Flash 32KB — Erase/Program via Flash interface unit and word writes to
CDBW. Data Flash can be read via either CDBR or XDB2, but
not by both simultaneously
Program RAM 4KB — None
Data RAM 32KB 32KB None
Program Boot Flash 32KB 32KB Erase/Program via Flash Interface unit and word writes to
CDBW
Table 4-2 OMR MB/MA Value at Reset
1
1. Information in shaded areas not applicable to 56F8365/56F8165.
OMR MB =
Flash Secured
State
2,3
2. This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
3. Changing MB in software will not affect Flash memory security.
OMR MA =
EXTBOOT Pin
Chip Operating Mode
0 0 Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
0 1 Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
1 0 Mode 0 – Internal Boot; EMI is configured to use 16 address lines
1 1 Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE pin
Table 4-1 Chip Memory Configurations
On-Chip Memory 56F8365 56F8165 Use Restrictions