Datasheet

56F8365 Technical Data, Rev. 9
74 Freescale Semiconductor
FCMB15_ID_LOW $BA Message Buffer 15 ID Low Register
FCMB15_DATA $BB Message Buffer 15 Data Register
FCMB15_DATA $BC Message Buffer 15 Data Register
FCMB15_DATA $BD Message Buffer 15 Data Register
FCMB15_DATA $BE Message Buffer 15 Data Register
Reserved
Table 4-39 FlexCAN2 Registers Address Map
(FC2_BASE = $00 FA00)
FlexCAN2 is NOT available in the 56F8165 device
Register Acronym Address Offset Register Description
FC2MCR $0 Module Configuration Register
Reserved
FC2CTL0 $3 Control Register 0 Register
FC2CTL1 $4 Control Register 1 Register
FC2TMR $5 Free-Running Timer Register
FC2MAXMB $6 Maximum Message Buffer Configuration Register
FC2IMASK2 $7 Interrupt Masks 2 Register
FC2RXGMASK_H $8 Receive Global Mask High Register
FC2RXGMASK_L $9 Receive Global Mask Low Register
FC2RX14MASK_H $A Receive Buffer 14 Mask High Register
FC2RX14MASK_L $B Receive Buffer 14 Mask Low Register
FC2RX15MASK_H $C Receive Buffer 15 Mask High Register
FC2RX15MASK_L $D Receive Buffer 15 Mask Low Register
Reserved
FC2STATUS $10 Error and Status Register
FC2IMASK1 $11 Interrupt Masks 1 Register
FC2IFLAG1 $12 Interrupt Flags 1 Register
FC2R/T_ERROR_CNTRS $13 Receive and Transmit Error Counters Register
Reserved
FC2IFLAG 2 $1B Interrupt Flags 2 Register
Table 4-38 FlexCAN Registers Address Map (Continued)
(FC_BASE = $00 F800)
FlexCAN is NOT available in the 56F8165 device
Register Acronym Address Offset Register Description