Datasheet

56F8365 Technical Data, Rev. 9
82 Freescale Semiconductor
Functional Mode
The ITCN is in this mode by default.
Wait and Stop Modes
During Wait and Stop modes, the system clocks and the 56800E core are turned off. The ITCN will signal
a pending IRQ to the System Integration Module (SIM) to restart the clocks and service the IRQ. An IRQ
can only wake up the core if the IRQ is enabled prior to entering the Wait or Stop mode. Also, the IRQA
and IRQB
signals automatically become low-level sensitive in these modes, even if the control register bits
are set to make them falling-edge sensitive. This is because there is no clock available to detect the falling
edge.
A peripheral which requires a clock to generate interrupts will not be able to generate interrupts during Stop
mode. The FlexCAN module can wake the device from Stop, and a reset will do just that, or IRQA
and
IRQB
can wake it up.
5.6 Register Descriptions
A register address is the sum of a base address and an address offset. The base address is defined at the
system level and the address offset is defined at the module level. The ITCN peripheral has 24 registers.
Table 5-3 ITCN Register Summary
(ITCN_BASE = $00F1A0)
Register
Acronym
Base Address + Register Name Section Location
IPR0 $0 Interrupt Priority Register 0 5.6.1
IPR1 $1 Interrupt Priority Register 1 5.6.2
IPR2 $2 Interrupt Priority Register 2 5.6.3
IPR3 $3 Interrupt Priority Register 3 5.6.4
IPR4 $4 Interrupt Priority Register 4 5.6.5
IPR5 $5 Interrupt Priority Register 5 5.6.6
IPR6 $6 Interrupt Priority Register 6 5.6.7
IPR7 $7 Interrupt Priority Register 7 5.6.8
IPR8 $8 Interrupt Priority Register 8 5.6.9
IPR9 $9 Interrupt Priority Register 9 5.6.10
VBA $A Vector Base Address Register 5.6.11
FIM0 $B Fast Interrupt 0 Match Register 5.6.12
FIVAL0 $C Fast Interrupt 0 Vector Address Low Register 5.6.13
FIVAH0 $D Fast Interrupt 0 Vector Address High Register 5.6.14
FIM1 $E Fast Interrupt 1 Match Register 5.6.15
FIVAL1 $F Fast Interrupt 1 Vector Address Low Register 5.6.16
FIVAH1 $10 Fast Interrupt 1 Vector Address High Register 5.6.17