Datasheet

Peripheral Memory Mapped Registers
56F8366 Technical Data, Rev. 7
Freescale Semiconductor 51
Preliminary
SIM SIM X:$00 F350 4-35
Power Supervisor LVI X:$00 F360 4-36
FM FM X:$00 F400 4-37
FlexCAN FC X:$00 F800 4-38
FlexCAN2 FC X:$00 FA00 4-39
Table 4-10 External Memory Integration Registers Address Map
(EMI_BASE = $00 F020)
Register Acronym Address Offset Register Description Reset Value
CSBAR 0 $0 Chip Select Base Address Register 0 0x0004 = 64K when
EXTBOOT = 0 or
EMI_MODE = 0
0x0008 = 1M when
EMI_Mode = 1 (Selects
entire program space for
CS0)
Note that A17-A19 are not
available in this package
CSBAR 1 $1 Chip Select Base Address Register 1 0x0004 = 64K when
EMI_MODE = 0
0x0008 = 1M when
EMI_MODE = 1 (Selects
A0 - A19 addressable data
space for CS1)
Note that A17-A19 are not
available in this package
CSBAR 2 $2 Chip Select Base Address Register 2
CSBAR 3 $3 Chip Select Base Address Register 3
CSBAR 4 $4 Chip Select Base Address Register 4
CSBAR 5 $5 Chip Select Base Address Register 5
CSBAR 6 $6 Chip Select Base Address Register 6
CSBAR 7 $7 Chip Select Base Address Register 7
CSOR 0 $8 Chip Select Option Register 0 0x5FCB programmed for
chip select for program
space, word wide, read and
write, 11 waits
Table 4-9 Data Memory Peripheral Base Address Map Summary (Continued)
Peripheral Prefix Base Address Table Number