Datasheet
Peripheral Memory Mapped Registers
56F8366 Technical Data, Rev. 7
Freescale Semiconductor 79
Preliminary
FC2MB2_CONTROL $50 Message Buffer 2 Control / Status Register
FC2MB2_ID_HIGH $51 Message Buffer 2 ID High Register
FC2MB2_ID_LOW $52 Message Buffer 2 ID Low Register
FC2MB2_DATA $53 Message Buffer 2 Data Register
FC2MB2_DATA $54 Message Buffer 2 Data Register
FC2MB2_DATA $55 Message Buffer 2 Data Register
FC2MB2_DATA $56 Message Buffer 2 Data Register
Reserved
FC2MB3_CONTROL $58 Message Buffer 3 Control / Status Register
FC2MB3_ID_HIGH $59 Message Buffer 3 ID High Register
FC2MB3_ID_LOW $5A Message Buffer 3 ID Low Register
FC2MB3_DATA $5B Message Buffer 3 Data Register
FC2MB3_DATA $5C Message Buffer 3 Data Register
FC2MB3_DATA $5D Message Buffer 3 Data Register
FC2MB3_DATA $5E Message Buffer 3 Data Register
Reserved
FC2MB4_CONTROL $60 Message Buffer 4 Control / Status Register
FC2MB4_ID_HIGH $61 Message Buffer 4 ID High Register
FC2MB4_ID_LOW $62 Message Buffer 4 ID Low Register
FC2MB4_DATA $63 Message Buffer 4 Data Register
FC2MB4_DATA $64 Message Buffer 4 Data Register
FC2MB4_DATA $65 Message Buffer 4 Data Register
FC2MB4_DATA $66 Message Buffer 4 Data Register
Reserved
FC2MB5_CONTROL $68 Message Buffer 5 Control / Status Register
FC2MB5_ID_HIGH $69 Message Buffer 5 ID High Register
FC2MB5_ID_LOW $6A Message Buffer 5 ID Low Register
FC2MB5_DATA $6B Message Buffer 5 Data Register
FC2MB5_DATA $6C Message Buffer 5 Data Register
FC2MB5_DATA $6D Message Buffer 5 Data Register
FC2MB5_DATA $6E Message Buffer 5 Data Register
Table 4-39 FlexCAN2 Registers Address Map (Continued)
(FC2_BASE = $00 FA00)
FlexCAN2 is NOT available in the 56F8166 device
Register Acronym Address Offset Register Description
