Datasheet

56F8367 Technical Data, Rev. 9
12 Freescale Semiconductor
Preliminary
Figure 1-2 Peripheral Subsystem
FlexCAN2
FlexCAN
Quadrature Decoder 1
TEMP_SENSE
Timer B
Timer D
Timer A
Timer C
SPI 1
ADCB
ADCA
GPIO A
SPI 0
SCI 0
SCI 1
Interrupt
Controller
PWMB
Quadrature Decoder 0
Note: ADC A and ADC B use the same voltage
reference circuit with V
REFH
, V
REFP
, V
REFMID
,
V
REFN
, and V
REFLO
pins.
GPIO B
GPIO C
GPIO D
GPIO E
GPIO F
CLKGEN
(OSC/PLL)
POR & LVI
SIM
SYNC Output
SYNC Output
To/From IPBus Bridge
Low Voltage Interrupt
System POR
COP Reset
RESET
13
2
2
13
2
8
8
1
2
2
4
4
4
4
ch3i ch2i
ch2och3o
PWMA
NOT available on the 56F8167 device.
COP
IPBus