Datasheet

56F8367 Technical Data, Rev. 9
162 Freescale Semiconductor
Preliminary
Signal-to-noise plus distortion ratio SINAD — 59.1 — db
Total Harmonic Distortion THD — 60.6 — db
Spurious Free Dynamic Range SFDR — 61.1 — db
Effective Number Of Bits
8
ENOB — 9.6 — Bits
1. INL measured from V
in
= .1V
REFH
to V
in
= .9V
REFH
10% to 90% Input Signal Range
2. LSB = Least Significant Bit
3. ADC clock cycles
4. Assumes each voltage reference pin is bypassed with 0.1μF ceramic capacitors to ground
5. The current that can be injected or sourced from an unselected ADC signal input without impacting the performance of the
ADC. This allows the ADC to operate in noisy industrial environments where inductive flyback is possible.
6. Absolute error includes the effects of both gain error and offset error.
7. Please see the 56F8300Peripheral User’s Manual for additional information on ADC calibration.
8. ENOB = (SINAD - 1.76)/6.02
Table 10-24 ADC Parameters (Continued)
Characteristic Symbol Min Typ Max Unit