Datasheet

Peripheral Memory Mapped Registers

56F8367 Technical Data, Rev. 9

Freescale Semiconductor 59

Preliminary

PWMA_PMPORT $11 Port Register

PWMA_PMICCR $12

PWM Internal Correction Control Register

Table 4-16 Pulse Width Modulator B Registers Address Map

(PWMB_BASE = $00 F160)

PWMB_PMCTL $0 Control Register

PWMB_PMFCTL $1 Fault Control Register

PWMB_PMFSA $2 Fault Status Acknowledge Register

PWMB_PMOUT $3 Output Control Register

PWMB_PMCNT $4 Counter Register

PWMB_PWMCM $5 Counter Modulo Register

PWMB_PWMVAL0 $6 Value Register 0

PWMB_PWMVAL1 $7 Value Register 1

PWMB_PWMVAL2 $8 Value Register 2

PWMB_PWMVAL3 $9 Value Register 3

PWMB_PWMVAL4 $A Value Register 4

PWMB_PWMVAL5 $B Value Register 5

PWMB_PMDEADTM $C Dead Time Register

PWMB_PMDISMAP1 $D Disable Mapping Register 1

PWMB_PMDISMAP2 $E Disable Mapping Register 2

PWMB_PMCFG $F Configure Register

PWMB_PMCCR $10 Channel Control Register

PWMB_PMPORT $11 Port Register

PWMB_PMICCR $12

PWM Internal Correction Control Register

Table 4-17 Quadrature Decoder 0 Registers Address Map

(DEC0_BASE = $00 F180)

DEC0_DECCR $0 Decoder Control Register

DEC0_FIR $1 Filter Interval Register

DEC0_WTR $2 Watchdog Time-out Register

DEC0_POSD $3 Position Difference Counter Register

DEC0_POSDH $4 Position Difference Counter Hold Register

Table 4-15 Pulse Width Modulator A Registers Address Map (Continued)

(PWMA_BASE = $00 F140)

PWMA is NOT available in the 56F8167 device