Datasheet
Peripheral Memory Mapped Registers
56F8367 Technical Data, Rev. 9
Freescale Semiconductor 75
Preliminary
Reserved
FCMB14_CONTROL $B0 Message Buffer 14 Control / Status Register
FCMB14_ID_HIGH $B1 Message Buffer 14 ID High Register
FCMB14_ID_LOW $B2 Message Buffer 14 ID Low Register
FCMB14_DATA $B3 Message Buffer 14 Data Register
FCMB14_DATA $B4 Message Buffer 14 Data Register
FCMB14_DATA $B5 Message Buffer 14 Data Register
FCMB14_DATA $B6 Message Buffer 14 Data Register
Reserved
FCMB15_CONTROL $B8 Message Buffer 15 Control / Status Register
FCMB15_ID_HIGH $B9 Message Buffer 15 ID High Register
FCMB15_ID_LOW $BA Message Buffer 15 ID Low Register
FCMB15_DATA $BB Message Buffer 15 Data Register
FCMB15_DATA $BC Message Buffer 15 Data Register
FCMB15_DATA $BD Message Buffer 15 Data Register
FCMB15_DATA $BE Message Buffer 15 Data Register
Reserved
Table 4-39 FlexCAN2 Registers Address Map
(FC2_BASE = $00 FA00)
FlexCAN2 is NOT available in the 56F8167 device
Register Acronym Address Offset Register Description
FC2MCR $0 Module Configuration Register
Reserved
FC2CTL0 $3 Control Register 0 Register
FC2CTL1 $4 Control Register 1 Register
FC2TMR $5 Free-Running Timer Register
FC2MAXMB $6 Maximum Message Buffer Configuration Register
FC2IMASK2 $7 Interrupt Masks 2 Register
FC2RXGMASK_H $8 Receive Global Mask High Register
FC2RXGMASK_L $9 Receive Global Mask Low Register
FC2RX14MASK_H $A Receive Buffer 14 Mask High Register
FC2RX14MASK_L $B Receive Buffer 14 Mask Low Register
Table 4-38 FlexCAN Registers Address Map (Continued)
(FC_BASE = $00 F800)
FlexCAN is NOT available in the 56F8167 device
Register Acronym Address Offset Register Description
