Datasheet

MC68332 MOTOROLA
MC68332TS/D 35
DSACK — Data and Size Acknowledge
This field specifies the source of DSACK in asynchronous mode. It also allows the user to adjust bus
timing with internal DSACK generation by controlling the number of wait states that are inserted to op-
timize bus speed in a particular application. The following table shows the DSACK field encoding. The
fast termination encoding (1110) is used for two-cycle access to external memory.
SPACE — Address Space
Use this option field to select an address space for the chip-select logic. The CPU32 normally operates
in supervisor or user space, but interrupt acknowledge cycles must take place in CPU space.
IPL — Interrupt Priority Level
If the space field is set for CPU space (00), chip-select logic can be used for interrupt acknowledge.
During an interrupt acknowledge cycle, the priority level on address lines ADDR[3:1] is compared to the
value in the IPL field. If the values are the same, a chip select is asserted, provided that other option
register conditions are met. The following table shows IPL field encoding.
This field only affects the response of chip selects and does not affect interrupt recognition by the CPU.
Any level means that chip select is asserted regardless of the level of the interrupt acknowledge cycle.
DSACK Description
0000 No Wait States
0001 1 Wait State
0010 2 Wait States
0011 3 Wait States
0100 4 Wait States
0101 5 Wait States
0110 6 Wait States
0111 7 Wait States
1000 8 Wait States
1001 9 Wait States
1010 10 Wait States
1011 11 Wait States
1100 12 Wait States
1101 13 Wait States
1110 Fast Termination
1111 External DSACK
Space Field Address Space
00 CPU Space
01 User Space
10 Supervisor Space
11 Supervisor/User Space
IPL Description
000 Any Level
001 IPL1
010 IPL2
011 IPL3
100 IPL4
101 IPL5
110 IPL6
111 IPL7
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...