Datasheet

I/O Registers
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Freescale Semiconductor 53
3.7.4 ADC Voltage Reference Low Pin (V
REFL
)
The ADC analog portion uses V
REFL
as its lower voltage reference pin. By default, connect the V
REFH
pin
to the same voltage potential as V
SS
. External filtering is often necessary to ensure a clean V
REFL
for good
results. Any noise present on this pin will be reflected and possibly magnified in A/D conversion values.
NOTE
For maximum noise immunity, route V
REFL
carefully and, if not connected
to V
SS
, place bypass capacitors as close as possible to the package.
Routing V
REFH
close and parallel to V
REFL
may improve common mode
noise rejection.
V
SSAD
and V
REFL
are double-bonded on the MC68HC908GZ16.
3.7.5 ADC Voltage In (V
ADIN
)
V
ADIN
is the input voltage signal from one of the eight ADC channels to the ADC module.
3.8 I/O Registers
These I/O registers control and monitor ADC operation:
• ADC status and control register (ADSCR)
• ADC data register (ADRH and ADRL)
• ADC clock register (ADCLK)
3.8.1 ADC Status and Control Register
Function of the ADC status and control register (ADSCR) is described here.
COCO — Conversions Complete Bit
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a logic 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
AIEN — ADC Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
Address: $003C
Bit 7654321Bit 0
Read:
COCO AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Write:
Reset:00011111
Figure 3-4. ADC Status and Control Register (ADSCR)