Datasheet

Input/Output (I/O) Ports
Technical Data MC68HC908LJ12 — Rev. 2.1
354 Input/Output (I/O) Ports Freescale Semiconductor
17.6 Port D
Port D is an 8-bit special function port that shares four of its pins with
serial peripheral interface (SPI) module and four of its pins with the
keyboard interrupt module (KBI).
NOTE: Port D is not available in a 52-pin LQFP.
17.6.1 Port D Data Register (PTD)
The port D data register contains a data latch for each of the eight port D
pins.
NOTE: Bit 0–bit 7 of PTD are not available in a 52-pin LQFP.
PTD[7:0] — Port D Data Bits
These read/write bits are software programmable. Data direction of
each port D pin is under the control of the corresponding bit in data
direction register D. Reset has no effect on port D data.
SS, MISO, MOSI, and SPSCK — SPI functional pins
These are the chip select, master-input-slave-output, master-output-
slave-input and clock pins for the SPI module. The SPI enable bit,
SPE, in the SPI control register, SPCR, enables these pins as the SPI
functional pins and overrides any control from port I/O logic. See
Section 14. Serial Peripheral Interface Module (SPI).
Address: $0003
Bit 7654321Bit 0
Read:
PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0
Write:
Reset: Unaffected by reset
Alternative Function: KBI7 KBI6 KBI5 KBI4 SPSCK MOSI MISO SS
Figure 17-12. Port D Data Register (PTD)