Datasheet

MOTOROLA MC68332

70 MC68332TS/D

NOTES:

1. PQS2 is a digital I/O pin unless the SPI is enabled (SPE in SPCR1 set), in which case it becomes SPI

serial clock SCK.

2. PQS7 is a digital I/O pin unless the SCI transmitter is enabled (TE in SCCR1 = 1), in which case it be-

comes SCI serial output TXD.

DDRQS determines the direction of the TXD pin only when the SCI transmitter is disabled. When the

SCI transmitter is enabled, the TXD pin is an output.

Table 26 Effect of DDRQS on QSM Pin Function

QSM Pin Mode DDRQS

Bit

State

Pin Function

MISO Master DDQ0 0 Serial Data Input to QSPI

1 Disables Data Input

Slave 0 Disables Data Output

1 Serial Data Output from QSPI

MOSI Master DDQ1 0 Disables Data Output

1 Serial Data Output from QSPI

Slave 0 Serial Data Input to QSPI

1 Disables Data Input

SCK

Master DDQ2 0 Disables Clock Output

1 Clock Output from QSPI

Slave 0 Clock Input to QSPI

1 Disables Clock Input

PCS0/SS

Master DDQ3 0 Assertion Causes Mode Fault

1 Chip-Select Output

Slave 0 QSPI Slave Select Input

1 Disables Select Input

PCS[3:1] Master DDQ[4:6] 0 Disables Chip-Select Output

1 Chip-Select Output

Slave 0 Inactive

1 Inactive

TXD

Transmit DDQ7 X Serial Data Output from SCI

RXD Receive None NA Serial Data Input to SCI

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