Datasheet

MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5
18 Freescale Semiconductor
Electrical and Thermal Characteristics
Figure 5 provides the mode select input timing diagram for the MPC7447A. The mode select inputs are
sampled twice, once before and once after HRESET negation.
Figure 5. Mode Input Sample Timing Diagram
Figure 6 provides the input/output timing diagram for the MPC7447A.
Figure 6. Input/Output Timing Diagram
HRESET
Mode Signals
V
M
= Midpoint Voltage (OV
DD
/2)
SYSCLK
1st Sample
2nd Sample
V
M
V
M
SYSCLK
All Inputs
V
M
V
M
= Midpoint Voltage (OV
DD
/2)
All Outputs
t
KHOX
V
M
t
KHDV
(Except TS,
ARTRY, SHD0, SHD1)
All Outputs
TS
ARTRY,
(Except TS
,
ARTRY, SHD0, SHD1)
V
M
t
KHOE
t
KHOZ
t
KHTSPZ
t
KHARPZ
t
KHARP
SHD1
SHD0,
t
KHOV
t
KHAV
t
KHDX
t
KHAX
t
IXKH
t
AXKH
t
KHTSX
t
KHTSV
t
KHTSV
t
KHARV
t
KHARX
t
IVKH
t
AVKH
t
MVKH
t
MXKH