Datasheet
Table Of Contents
- 1 Overview
- 2 Features
- 3 Comparison with the MPC7447, MPC7445, and MPC7441
- 4 General Parameters
- 5 Electrical and Thermal Characteristics
- 6 Pin Assignments
- 7 Pinout Listings
- 8 Package Description
- 8.1 Package Parameters for the MPC7447A, 360 HCTE BGA
- 8.2 Mechanical Dimensions for the MPC7447A, 360 HCTE BGA
- 8.3 Package Parameters for the MPC7447A, 360 HCTE LGA
- 8.4 Mechanical Dimensions for the MPC7447A, 360 HCTE LGA
- 8.5 Package Parameters for the MPC7447A, 360 HCTE RoHS-Compliant BGA
- 8.6 Mechanical Dimensions for the MPC7447A, 360 HCTE RoHS-Compliant BGA
- 8.7 Substrate Capacitors for the MPC7447A, 360 HCTE
- 9 System Design Information
- 9.1 Clocks
- 9.2 PLL Power Supply Filtering
- 9.3 Decoupling Recommendations
- 9.4 Connection Recommendations
- 9.5 Output Buffer DC Impedance
- 9.6 Pull-Up/Pull-Down Resistor Requirements
- 9.7 JTAG Configuration Signals
- 9.8 Thermal Management Information
- Figure 20. BGA Package Exploded Cross-Sectional View with Several Heat Sink Options
- Figure 21. LGA Package Exploded Cross-Sectional View with Several Heat Sink Options
- 9.8.1 Internal Package Conduction Resistance
- 9.8.2 Thermal Interface Materials
- 9.8.3 Heat Sink Selection Example
- 9.8.4 Temperature Diode
- 9.8.5 Dynamic Frequency Switching (DFS)
- 10 Document Revision History
- 11 Ordering Information
MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5
Freescale Semiconductor 39
System Design Information
Figure 18. Driver Impedance Measurement
Table 15 summarizes the signal impedance results. The impedance increases with junction temperature
and is relatively unaffected by bus voltage.
9.6 Pull-Up/Pull-Down Resistor Requirements
The MPC7447A requires high-resistive (weak: 4.7 KΩ) pull-up resistors on several control pins of the bus
interface to maintain the control signals in the negated state after they have been actively negated and
released by the MPC7447A or other bus masters. These pins are: TS, ARTRY, SHDO, and SHD1.
Some pins designated as being factory test pins must be pulled up to OV
DD
or down to GND to ensure
proper device operation. The pins that must be pulled up to OV
DD
are: LSSD_MODE and TEST[0:3]; the
pins that must be pulled down to GND are: L1_TSTCLK and TEST[4]. The CKSTP_IN
signal should
likewise be pulled up through a pull-up resistor (weak or stronger: 4.7 KΩ–1 KΩ) to prevent erroneous
assertions of this signal.
In addition, the MPC7447A has one open-drain style output that requires a pull-up resistor (weak or
stronger: 4.7 KΩ–1 KΩ) if it is used by the system. This pin is CKSTP_OUT
.
If pull-down resistors are used to configure BVSEL, the resistors should be less than 250 Ω (see Table 12).
Because PLL_CFG[0:4] must remain stable during normal operation, strong pull-up and pull-down
resistors (1 KΩ or less) are recommended to configure these signals in order to protect against erroneous
switching due to ground bounce, power supply noise or noise coupling.
Table 15. Impedance Characteristics
V
DD
= 1.5 V, OV
DD
= 1.8 V ± 5%, T
j
= 5°–85°C
Impedance Processor Bus Unit
Z
0
Typical 33–42 Ω
Maximum 31–51 Ω
OV
DD
OGND
R
P
R
N
Pad
Data
SW1
SW2