Datasheet

Clock Module
MC68HC812A4 Data Sheet, Rev. 7
104 Freescale Semiconductor
Figure 10-4. Clock Chain for SCI0, SCI1, RTI, and COP
Figure 10-5. Clock Chain for TIM
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0:0:0
0:0:1
0:1:0
0:1:1
1:0:1
1:1:0
1:1:1
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 4
÷ 4
÷ 4
÷ 4
÷ 4
÷ 4
1:0:0
SCI0 RECEIVE
BAUD RATE
(16X)
SCI0 TRANSMIT
BAUD RATE
(1X)
SCI0 BAUD RATE
GENERATOR
(³ 1 TO 8191)
REGISTER: RTICTL
BITS:
RTR[2:1:0]
REGISTER: COPCTL
BITS:
CR[2:1:0]
÷ 8192
÷ 16
SCI1 RECEIVE
BAUD RATE
(16X)
SCI1 TRANSMIT
BAUD RATE
(1X)
SCI1 BAUD RATE
GENERATOR
(³ 1 TO 8191)
÷ 16
MCLK
TO RTI
TO COP
MCLK
PORT T7
PACLK
PACLK
(PAOV)
TEN
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
REGISTER: TMSK2
BITS:
PR[2:0]
PAMOD
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
GATE LOGIC
PAEN
PULSE
ACCUMULATOR
LOW BYTE
PULSE
ACCUMULATOR
HIGH BYTE
1:0:0
1:0:1
1:1:0
1:1:1
REGISTER: PACTL
BITS:
PAEN:CLK1:CLK0
0:X:X
TO TIM
COUNTER
65,536
PACLK
256