Datasheet

Standard Timer Module
MC68HC812A4 Data Sheet, Rev. 7
126 Freescale Semiconductor
12.5.3 Timer Output Compare 7 Mask Register
Read: Anytime
Write: Anytime
OC7M7–OC7M0 — Output Compare 7 Mask Bits
Setting an OC7Mx bit configures the corresponding TIMPORT pin to be an output. OC7Mx makes the
timer port pin an output regardless of the data direction bit when the pin is configured for output
compare (IOSx = 1). The OC7Mx bits do not change the state of the TIMDDR bits.
1 = Corresponding TIMPORT pin output
0 = Corresponding TIMPORT pin input
12.5.4 Timer Output Compare 7 Data Register
Read: Anytime
Write: Anytime
OC7D7–OC7D0 — Output Compare Data Bits
When a successful channel 7 output compare occurs, these bits transfer to the timer port data register
if the corresponding OC7Mx bits are set.
NOTE
A successful channel 7 output compare overrides any channel 0–6
compares. For each OC7M bit that is set, the output compare action reflects
the corresponding OC7D bit.
Address: $0082
Bit 7654321Bit 0
Read:
OC7M7 OC7M6 OC7M5 OC7M4 OC7M3 OC7M2 OC7M1 OC7M0
Write:
Reset:00000000
Figure 12-6. Timer Output Compare 7 Mask Register (OC7M)
Address: $0083
Bit 7654321Bit 0
Read:
OC7D7 OC7D6 OC7D5 OC7D4 OC7D3 OC7D2 OC7D1 OC7D0
Write:
Reset:00000000
Figure 12-7. Timer Output Compare 7 Data Register (OC7D)