Datasheet

Registers and Reset Initialization
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 127
12.5.5 Timer Counter Registers
Read: Anytime
Write: Only in special modes; has no effect in normal modes
Use a double-byte read instruction to read the timer counter. Two single-byte reads return a different
value than a double-byte read.
NOTE
The period of the first count after a write to the TCNT registers may be a
different size because the write is not synchronized with the prescaler
clock.
12.5.6 Timer System Control Register
Read: Anytime
Write: Anytime
TEN — Timer Enable Bit
TEN enables the timer. Clearing TEN reduces power consumption.
1 = Timer enabled
0 = Timer and timer counter disabled
When the timer is disabled, there is no divided-by-64 clock for the PA since the prescaler generates
the M ÷ 64 clock.
Address: $0084
Bit 7654321Bit 0
Read: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset:00000000
= Unimplemented
Figure 12-8. Timer Counter Register High (TCNTH)
Address: $0085
Bit 7654321Bit 0
Read: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:00000000
= Unimplemented
Figure 12-9. Timer Counter Register Low (TCNTL)
Address: $0086
Bit 7654321Bit 0
Read:
TEN TSWAI TSBCK TFFCA
0000
Write:
Reset:00000000
= Unimplemented
Figure 12-10. Timer System Control Register (TSCR)