Datasheet

Standard Timer Module
MC68HC812A4 Data Sheet, Rev. 7
128 Freescale Semiconductor
TSWAI — Timer Stop in Wait Mode Bit
TSWAI disables the timer and PA in wait mode.
1 = Timer and PA disabled in wait mode
0 = Timer and PA enabled in wait mode
NOTE
If timer and PA interrupt requests are needed to bring the MCU out of wait
mode, clear TSWAI before executing the WAIT instruction.
TSBCK — Timer Stop in Background Mode Bit
TSBCK stops the timer during background mode.
1 = Timer disabled in background mode
0 = Timer enabled in background mode
NOTE
Setting TSBCK does not stop the PA when it is in event counter mode.
TFFCA — Timer Fast Flag Clear-All Bit
When TFFCA is set:
– An input capture read or a write to an output compare channel clears the corresponding
channel flag, CnF.
– Any access of the timer counter registers, TCNTH/L, clears the TOF flag.
– Any access of the PA counter registers, PACNTH/L, clears both the PAOVF and PAIF flags in
the PAFLG register.
When TFFCA is clear, writing logic 1s to the flags clears them.
1 = Fast flag clearing
0 = Normal flag clearing
Figure 12-11. Fast Clear Flag Logic
CLEAR
WRITE TCx REGISTERS
READ TCx REGISTERS
TFFCA
DATA BIT n
WRITE TFLG1 REGISTER
CnF
CnF FLAG