Datasheet

Registers and Reset Initialization
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 129
12.5.7 Timer Control Registers 1 and 2
Read: Anytime
Write: Anytime
OMx/OLx — Output Mode/Output Level Bits
These bit pairs select the output action to be taken as a result of a successful output compare. When
either OMx or OLx is set and the IOSx bit is set, the pin is an output regardless of the state of the
corresponding DDRT bit.
Channel 7 shares a pin with the pulse accumulator input pin. To use the PAI input, clear both the OM7
and OL7 bits and clear the OC7M7 bit in the output compare 7 mask register.
Address: $0088
Bit 7654321Bit 0
Read:
OM7OL7OM6OL6OM5OL5OM4OL4
Write:
Reset:00000000
Figure 12-12. Timer Control Register 1 (TCTL1)
Address: $0089
Bit 7654321Bit 0
Read:
OM3OL3OM2OL2OM1OL1OM0OL0
Write:
Reset:00000000
Figure 12-13. Timer Control Register 2 (TCTL2)
Table 12-1. Selection of Output Compare Action
OMx:OLx Action on Output Compare
00 Timer disconnected from output pin logic
01 Toggle OCn output line
10 Clear OCn output line
11 Set OCn output line