Datasheet

External Pins
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 137
12.5.17 Timer Test Register
Read: Anytime
Write: Only in special mode (SMODN = 0)
TCBYP — Timer Divider Chain Bypass Bit
TCBYP divides the 16-bit free-running timer counter into two 8-bit halves. The clock drives both halves
directly and bypasses the timer prescaler.
1 = Timer counter divided in half and prescaler bypassed
0 = Normal operation
PCBYP — Pulse Accumulator Divider Chain Bypass Bit
PCBYP divides the 16-bit PA counter into two 8-bit halves. The clock drives both halves directly and
bypasses the timer prescaler.
1 = PA counter divided in half and prescaler bypassed
0 = Normal operation
12.6 External Pins
The timer has eight pins for input capture and output compare functions. One of the pins is also the pulse
accumulator input. All eight pins are available for general-purpose I/O when not configured for timer
functions.
12.6.1 Input Capture/Output Compare Pins
The IOSx bits in the timer IC/OC select register configure the timer port pins as either output compare or
input capture pins.
The timer port data direction register controls the data direction of an input capture pin. External pin
conditions trigger input captures on input capture pins configured as inputs. Software triggers input
captures on input capture pins configured as outputs.
The timer port data direction register does not affect the data direction of an output compare pin. The
output compare function overrides the data direction register but does not affect the state of the data
direction register.
Address: $00AD
Bit 7654321Bit 0
Read:000000TCBYPPCBYP
Write:
Reset:00000000
= Unimplemented
Figure 12-24. Timer Test Register (TIMTST)