Datasheet

Multiple Serial Interface (MSI)
MC68HC812A4 Data Sheet, Rev. 7
148 Freescale Semiconductor
13.6.2 Port S Data Direction Register
Read: Anytime
Write: Anytime
DDRS7–DDRS0 — Port S Data Direction Bits
These bits control the data direction of each port S pin. Setting a DDRS bit makes the pin an output;
clearing a DDRS bit makes the pin an input. Reset clears the port S data direction register, configuring
all port S pins as inputs.
1 = Corresponding port S pin configured as output
0 = Corresponding port S pin configured as input
NOTE
When the LOOPS bit is clear, the RX pins of SCI0 and SCI1 are inputs and
the TX pins are outputs regardless of their DDRS bits.
When the SPI is enabled, an SPI input pin is an input regardless of its
DDRS bit.
When the SPI is enabled, an SPI output is an output only if its DDRS bit is
set. When the DDRS bit of an SPI output is clear, the pin is available for
general-purpose I/O.
13.6.3 Port S Pullup and Reduced Drive Control
Read: Anytime
Write: Anytime
PUPS — Pullup Port S Enable Bit
Setting PUPS enables internal pullup devices on all port S input pins. If a pin is programmed as output,
the pullup device becomes inactive.
1 = Pullups enabled
0 = Pullups disabled
Address: $00D7
Bit 7654321Bit 0
Read:
DDRS7 DDRS6 DDRS5 DDRS4 DDRS3 DDRS2 DDRS1 DDRS0
Write:
Reset:00000000
Figure 13-4. Port S Data Direction Register (DDRS)
Address: $00D1
Bit 7654321Bit 0
Read:0000
PUPS RDS
0
SPC0
Write:
Reset:00001000
= Unimplemented
Figure 13-5. SPI Control Register 2 (SP0CR2)