Datasheet

General-Purpose I/O Ports
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 149
RDS — Reduced Drive Port S Bit
Setting RDS lowers the drive capability of all port S output pins for lower power consumption and less
noise.
1 = Reduced drive
0 = Full drive
SPC0 — See Chapter 14 Serial Communications Interface Module (SCI).
13.6.4 Port S Wired-OR Mode Control
Table 13-1. Port S Pullup and Reduced Drive Enable
Register
Pullups Reduced Drive
Control
Bit
Pins
Affected
Reset
State
Control
Bit
Pins
Affected
Reset
State
SPI control register 2
(SP0CR2)
PUPS PS7–PS0 Enabled RDS PS7–PS0 Disabled
Table 13-2. Port S Wired-OR Mode Enable
Register
Control
Bit
Pins
Affected
Reset
State
SPI control register 1 (SP0CR1) SWOM PS7–PS4 Disabled
SCI0 control register 1 (SC0CR1) WOMS PS3, PS2 Disabled
SCI1 control register 1 (SC1CR1) WOMS PS1, PS0 Disabled