Datasheet

Functional Description
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 185
15.5.5 SS Output
In master mode only, the SS pin can function as a chip-select output for connection to the SS input of a
slave. The master SS
output automatically selects the slave by going low for each transmission and
deselects the slave by going high during each idling state.
Enable the SS
output by setting the master mode bit, MSTR, the slave-select output enable bit, SSOE,
and the data direction bit of the SS
pin. MSTR and SSOE are in SPI control register 1.
15.5.6 Single-Wire Operation
Normally, the SPI operates as a 2-wire interface; it uses its MOSI and MISO pins for transmitting and
receiving.
In single-wire operation, a master SPI uses the MOSI pin for both receiving and transmitting. The MOSI
pin becomes a master out, master in (MOMI) pin. The MISO pin is disconnected from the SPI and is
available as a general-purpose port S I/O pin.
A slave SPI in single-wire operation uses the MISO pin for both receiving and transmitting. The MISO pin
becomes a slave in, slave out (SISO) pin. The MOSI pin is disconnected from the SPI and is available as
a general-purpose I/O pin.
Setting serial pin control bit 0, SPC0, configures the SPI for single-wire operation. The direction of the
single-wire pin depends on its data direction bit.
Figure 15-8. Single-Wire Operation (SPC0 = 1)
Table 15-1. SS
Pin Configurations
Control Bits SS Pin Function
DDRS7 SSOE Master Mode Slave Mode
0 0 Slave-select input with mode-fault detection
Slave-select input
01 Reserved
1 0 General-purpose output
1 1 Slave-select output
SPI
MOMI
PS4
SERIAL OUT
SERIAL IN
DDRS5
SPI
PS5
SISO
DDRS4
SERIAL IN
SERIAL OUT
MASTER MODE
SLAVE MODE
GENERAL-
PURPOSE I/O
GENERAL-
PURPOSE I/O