Datasheet

Block Diagram
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 19
1.4 Block Diagram
Figure 1-2. Block Diagram
V
RH
V
RL
V
DDA
V
SSA
PORT E / PU
DDRE
PORT J / PU / PD
D
D
R
J
P
O
R
T
H
/
P
U
D
D
R
H
P
O
R
T
C
/
P
U
D
D
R
C
P
O
R
T
D
/
P
U
D
D
R
D
P
O
R
T
T
/
P
U
P
O
R
T
S
/
P
U
SPI0
SCI1
SCI0
XIRQ
IRQ/V
PP
R/W
LSTRB/TAGLO
ECLK
IPIPE0/MODA
IPIPE1/MODB
ARST
PERIODIC INTERRUPT
COP WATCHDOG
CLOCK MONITOR
INTERRUPT BLOCK
SINGLE-WIRE
BACKGROUND
DEBUG MODULE
1-KBYTE SRAM
4-KBYTE EEPROM
CPU12
P
O
R
T
A
D
D
D
R
T
TIM OC7
D
D
R
S
MSI
D
D
R
F
P
O
R
T
F
/
P
U
D
D
R
G
P
O
R
T
G
/
P
U
D
D
R
A
P
O
R
T
A
/
P
U
D
D
R
B
P
O
R
T
B
/
P
U
LIM
LITE INTEGRATION MODULE
L
M
B
–
L
I
T
E
M
O
D
U
L
E
B
U
S
PLL CLOCK
CONTROL
RXD0
TXD0
RXD1
TXD1
SDI/MISO
SDO/MOSI
SCK
BKGD
/ TAGHI
RESET
EXTAL
XTAL
XFC
V
DDPLL
V
SSPLL
KWJ7
KWJ6
KWJ5
KWJ4
KWJ3
KWJ2
KWJ1
KWJ0
KWH7
KWH6
KWH5
KWH4
KWH3
KWH2
KWH1
KWH0
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
DATA9
DATA8
DATA7/KWD7
DATA6/KWD6
DATA5/KWD5
DATA4/KWD4
DATA3/KWD3
DATA2/KWD2
DATA1/KWD1
DATA0/KWD0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
NON-MULTIPLEXED
ADDRESS/DATA BUS
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
ADDR21
ADDR20
ADDR19
ADDR18
ADDR17
ADDR16
CS0
CS1
CS2
CS3
CSD
CSP0
CSP1
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PG5
PG4
PG3
PG2
PG1
PG0
PF6
PF5
PF4
PF3
PF2
PF1
PF0
V
DD
x1
V
SSI
x1
V
DDEXT
x3
V
SSEXT
x3
PS7
PS6
PS5
PS4
PS3
PS2
PS1
PS0
PT7
PT6
PT5
PT4
PT3
PT2
PT1
PT0
IOC6
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
IOC7/PAI
PAD 7V
STBY
PAD 6
PAD 5
PAD 4
PAD 3
PAD 2
PAD 1
PAD 0
A/D
CONVERTER
V
RH
V
RL
V
DDA
V
SSA
V
STBY
/AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
SS