Datasheet

Registers and Reset Initialization
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 199
In both modes, the CCF flag associated with each register is set when that register is loaded with the
appropriate conversion result. That flag is cleared automatically when that result register is read. The
conversions are started by writing to the control registers.
The ATD control register 4 selects the clock source and sets up the prescaler. Writes to the ATD control
registers initiate a new conversion sequence. If a write occurs while a conversion is in progress, the
conversion is aborted and ATD activity halts until a write to ATDCTL5 occurs.
The ATD control register 5 selects conversion modes and conversion channel(s) and initiates
conversions.
A write to ATDCTL5 initiates a new conversion sequence. If a conversion sequence is in progress when
a write occurs, the sequence is aborted and the SCF and CCF flags are cleared.
16.6 Registers and Reset Initialization
This section describes the registers and reset initialization.
16.6.1 ATD Control Register 0
NOTE
Writing to this register aborts the current conversion sequence.
16.6.2 ATD Control Register 1
Address: $0060
Bit 7654321Bit 0
Read:
00000000
Write:
Reset:00000000
Figure 16-3. ATD Control Register 0 (ATDCTL0)
Address: $0061
Bit 7654321Bit 0
Read:00000000
Write:
Reset:00000000
= Unimplemented
Figure 16-4. ATD Control Register 1 (ATDCTL1)