Datasheet

Registers and Reset Initialization
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 203
MULT — Multichannel Conversion Bit
Refer to Table 16-4.
1 = Conversions of sequential channels
0 = Conversions of a single input channel selected by the CD, CC, CB, and CA bits
CD, CC, CB, and CA — Channel Select Bits
The channel select bits select the input to convert. LT = 1, the ATD sequencer selects
Table 16-4. Multichannel Mode Result Register Assignment
(1)
1. When MULT = 1, bits with asterisks are don’t care bits. The 4-conversion sequence from
AN0 to AN3 or the 8-conversion sequence from AN0 to AN7 is completed in the order
shown.
When MULT = 0, the CD, CC, CB, and CA bits select one input channel. The conversion
sequence is performed on this channel only.
S8CM CD CC CB CA Channel Input Result in ADRxH
00
0
0* 0* AN0 ADRxH0
0* 1* AN1 ADRxH1
1* 0* AN2 ADRxH2
1* 1* AN3 ADRxH3
1
0* 0* AN4 ADRxH0
0* 1* AN5 ADRxH1
1* 0* AN6 ADRxH2
1* 1* AN7 ADRxH3
01
0
0* 0* Reserved ADRxH0
0* 1* Reserved ADRxH1
1* 0* Reserved ADRxH2
1* 1* Reserved ADRxH3
1
0* 0*
V
RH
ADRxH0
0* 1*
V
RL
ADRxH1
1* 0*
(V
RH
+ V
RL
)/2
ADRxH2
1* 1* Test/Reserved ADRxH3
10
0*
0* 0* AN0 ADRxH0
0* 1* AN1 ADRxH1
1* 0* AN2 ADRxH2
1* 1* AN3 ADRxH3
1*
0* 0* AN4 ADRxH4
0* 1* AN5 ADRxH5
1* 0* AN6 ADRxH6
1* 1* AN7 ADRxH7
11
0*
0* 0* Reserved ADRxH0
0* 1* Reserved ADRxH1
1* 0* Reserved ADRxH2
1* 1* Reserved ADRxH3
1*
0* 0*
V
RH
ADRxH4
0* 1*
V
RL
ADRxH5
1* 0*
(V
RH
+ V
RL
)/2
ADRxH6
1* 1* Test/Reserved ADRxH7