Datasheet

Development Support
MC68HC812A4 Data Sheet, Rev. 7
214 Freescale Semiconductor
Figure 17-2. BDM Target-to-Host Serial Bit Timing (Logic 1)
Figure 17-3. BDM Target-to-Host Serial Bit Timing (Logic 0)
HOST SAMPLES BKGD PIN
10 CYCLES
E-CLOCK
TARGET MCU
HOST DRIVE
TO BKGD PIN
TARGET MCU
SPEED-UP PULSE
PERCEIVED START
OF BIT TIME
HIGH-IMPEDANCE
HIGH-IMPEDANCE
HIGH-IMPEDANCE
BKGD PIN
R-C RISE
10 CYCLES
EARLIEST START
OF NEXT BIT
10 CYCLES
E-CLOCK
TARGET MCU
HOST DRIVE
TO BKGD PIN
TARGET MCU
DRIVE AND
PERCEIVED START
OF BIT TIME
HIGH-IMPEDANCE
BKGD PIN
10 CYCLES
SPEED-UP PULSE
SPEED-UP
PULSE
EARLIEST START
OF NEXT BIT
HOST SAMPLES BKGD PIN