Datasheet

BDM Registers
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 219
17.4.2 BDM Status Register
This register can be read or written by BDM commands or firmware.
ENBDM — Enable BDM Bit (permit active background debug mode)
1 = BDM can be made active to allow firmware commands.
0 = BDM cannot be made active (hardware commands still allowed).
BDMACT — Background Mode Active Status Bit
1 = BDM active and waiting for serial commands
0 = BDM not active
ENTAG — Instruction Tagging Enable Bit
Set by the TAGGO instruction and cleared when BDM is entered.
1 = Tagging active (BDM cannot process serial commands while tagging is active.)
0 = Tagging not enabled or BDM active
SDV — Shifter Data Valid Bit
Shows that valid data is in the serial interface shift register. Used by firmware-based instructions.
1 = Valid data
0 = No valid data
TRACE — Asserted by the TRACE1 Instruction
17.4.3 BDM Shift Register
This 16-bit register contains data being received or transmitted via the serial interface.
Address: $FF01
Bit 76 54321Bit 0
Read:
ENBDM EDMACT ENTAG SDV TRACE 0 0 0
Write:
Reset:0 0 000000
Single-chip peripheral:1 0 000000
Figure 17-6. BDM Status Register (STATUS)
Address: $FF02
Bit 7654321Bit 0
Read:
S15 S14 S13 S12 S11 S10 S9 S8
Write:
Reset:00000000
Address: $FF03
Bit 7654321Bit 0
Read:
S7 S6 S5 S4 S3 S2 S1 S0
Write:
Reset:00000000
Figure 17-7. BDM Shift Register (SHIFTER)