Datasheet

ATD DC Electrical Characteristcs
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 225
18.7 ATD DC Electrical Characteristcs
18.8 Analog Converter Operating Characteristics
Characteristic
(1)
1. V
DD
= 5.0 Vdc ± 10%, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, ATD clock = 2 MHz, unless otherwise noted
Symbol Min Max Unit
Analog supply voltage
V
DDA
4.5 5.5 V
Analog supply current, normal operation
I
DDA
—1.0mA
Reference voltage, low
V
RL
V
SSA
V
DDA
/2
V
Reference voltage, high
V
RH
V
DDA
/2V
DDA
V
V
REF
differential reference voltage
(2)
2. Accuracy is guaranteed at V
RH
− V
RL
= 5.0 Vdc ± 10%.
V
RH
−V
RL
4.5 5.5 V
Input voltage
(3)
3. To obtain full-scale, full-range results, V
SSA
≤ V
RL
≤ V
INDC
≤ V
RH
≤ V
DDA
.
V
INDC
V
SSA
V
DDA
V
Input current, off channel
(4)
4. Maximum leakage occurs at maximum operating temperature. Current decreases by approximately one-half for each
10°C decrease from maximum temperature.
I
OFF
—100nA
Reference supply current
I
REF
—250µA
Input capacitance
Not sampling
Sampling
C
INN
C
INS
—
—
10
15
pF
Characteristic
(1)
1. V
DD
= 5.0 Vdc ± 10%, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, ATD clock = 2 MHz, unless otherwise noted
Symbol Min Typical Max Unit
8-bit resolution
(2)
2. V
RH
−V
RL
≥ 5.12 V; V
DDA
—V
SSA
= 5.12 V
2 counts — 24 — mV
Differential non-linearity
(3)
3. At V
REF
= 5.12 V, one 8-bit count = 20 mV.
DNL −0.5 — +0.5 Count
Integral non-linearity
(3)
INL −1— +1 Count
Absolute error
(3),(4)
2, 4, 8, and 16 ATD sample clocks
4. 8-bit absolute error of 1 count (20 mV) includes 1/2 count (10 mv) inherent quantization error and 1/2 count (10 mV) circuit
(differential, integral, and offset) error.
AE −2— +2 Count
Maximum source impedance
R
S
—20
See note
(5)
5. Maximum source impedance is application-dependent. Error resulting from pin leakage depends on junction leakage into
the pin and on leakage due to charge-sharing with internal capacitance.
Error from junction leakage is a function of external source impedance and input leakage current. Expected error in result
value due to junction leakage is expressed in voltage (V
ERRJ
):
V
ERRJ
= R
S
× I
OFF
where I
OFF
is a function of operating temperature. Charge-sharing effects with internal capacitors are a function of ATD
clock speed, the number of channels being scanned, and source impedance. For 8-bit conversions, charge pump leakage
is computed as follows:
V
ERRJ
= .25 pF × V
DDA
× R
S
× ATDCLK/(8 × number of channels)
kΩ