Datasheet

Peripheral Port Timing
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 231
18.12 Peripheral Port Timing
Figure 18-6. Port Read Timing Diagram
Figure 18-7. Port Write Timing Diagram
Characteristic Symbol
8.0 MHz
Unit
Min Max
Frequency of operation (E-clock frequency)
f
o
dc 8.0 MHz
E-clock period
t
cyc
125 — ns
Peripheral data setup time, MCU read of ports
t
PDSU
= t
cyc
/2 + 30
t
PDSU
102 — ns
Peripheral data hold time, MCU read of ports
t
PDH
0—ns
Delay time, peripheral data write, MCU write to ports
t
PWD
—40ns
ECLK
MCU READ OF PORT
PORTS
t
PDSU
t
PDH
ECLK
MCU WRITE TO PORT
PREVIOUS PORT DATA NEW DATA VALID
PORT A
t
PWD