Datasheet

MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 29
Chapter 2
Register Block
2.1 Overview
The register block can be mapped to any 2-Kbyte boundary within the standard 64-Kbyte address space
by manipulating bits REG15–REG11 in the INITRG register. INITRG establishes the upper five bits of the
register block’s 16-bit address.
The register block occupies the first 512 bytes of the 2-Kbyte block. Figure 2-1 shows the default
addressing.
2.2 Register Map
Addr.Register Name Bit 7654321Bit 0
$0000
Port A Data Register
(PORTA)
See page 64.
Read:
PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
Write:
Reset:00000000
$0001
Port B Data Register
(PORTB)
See page 65.
Read:
PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
Write:
Reset:00000000
$0002
Port A Data Direction
Register (DDRA)
See page 64.
Read:
DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
Write:
Reset:00000000
$0003
Port B Data Direction
Register (DDRB)
See page 65.
Read:
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
Write:
Reset:00000000
$0004
Port C Data Register
(PORTC)
See page 66.
Read:
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
Write:
Reset:00000000
$0005
Port D Data Register
(PORTD)
See page 67.
Read:
PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
Write:
Reset:00000000
$0006
Port C Data Direction
Register (DDRC)
See page 66.
Read:
DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
Write:
Reset:00000000
= Unimplemented
R
= Reserved U = Unaffected
Figure 2-1. Register Map (Sheet 1 of 14)