Datasheet

Register Map
MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 33
$0033
Port G Data Direction
Register (DDRG)
See page 86.
Read: 0 0
DDRG5 DDRG4 DDRG3 DDRG2 DDRG1 DDRG0
Write:
Reset:00000000
$0034
Data Page Register
(DPAGE)
See page 86.
Read:
PD19 PD18 PD17 PD16 PD15 PD14 PD13 PD12
Write:
Reset:00000000
$0035
Program Page Register
(PPAGE)
See page 87.
Read:
PPA21 PPA20 PPA19 PPA18 PPA17 PPA16 PPA15 PPA14
Write:
Reset:00000000
$0036
Extra Page Register
(EPAGE)
See page 87.
Read:
PEA17 PEA16 PEA15 PEA14 PEA13 PEA12 PEA11 PEA10
Write:
Reset:00000000
$0037
Window Definition
Register (WINDEF)
See page 87.
Read:
DWENPWENEWEN00000
Write:
Reset:00000000
$0038
Memory Expansion
Assignment Register
(MXAR) See page 88.
Read: 0 0
A21E A20E A19E A18E A17E A16E
Write:
Reset:00000000
$0039 Reserved RRRRRRRR
$003A Reserved RRRRRRRR
$003B Reserved RRRRRRRR
$003C
Chip-Select Control
Register 0 (CSCTL0)
See page 89.
Read: 0
CSP1E CSP0E CSDE CS3E CS2E CS1E CS0E
Write:
Reset:00000000
$003D
Chip-Select Control
Register 1 (CSCTL1)
See page 90.
Read: 0
CSP1FL CSPA21 CSDHF CS3EP
000
Write:
Reset:00000000
$003E
Chip-Select Stretch
Register 0 (CSSTR0)
See page 91.
Read: 0 0
SRP1A SRP1B SRP0A SRP0B STRDA STRDB
Write:
Reset:00111111
$003F
Chip-Select Stretch
Register 1 (CSSTR1)
See page 91.
Read:
STR3ASTR3BSTR2ASTR2BSTR1ASTR1BSTR0ASTR0B
Write:
Reset:00111111
$0040
Loop Divider Register High
(LDVH)
See page 113.
Read: 0 0 0 0
LDV11 LDV10 LDV9 LDV8
Write:
Reset:00001111
Addr.Register Name Bit 7654321Bit 0
= Unimplemented
R
= Reserved U = Unaffected
Figure 2-1. Register Map (Sheet 5 of 14)